PI(s): Spyros Tragoudas
UNIVERSITY: Southern Illinois University Carbondale
CODE: 103.SIUC.TRAG.23
STATUS: Completed
In Year 1, the efforts in the project focused on developing a deep learning-based approach to identify early delay defects in ICs using responses captured at the internal Test Points (TP). In Year 2, the goal is to develop Automatic Test Pattern Generation (ATPG) and Design for Testability (DFT) software tools at the RTL level. These time-consuming tasks should be performed before the physical design automation phase. Non-robust and Robust ATPG tools will be developed and evaluated. A coordinated ATPG and test point insertion method using deep learning will also be investigated in Year 2.
